x86/amd: Eliminate cache flushing when entering C3 on select AMD processors
authorMark Langsdorf <mark.langsdorf@amd.com>
Tue, 14 Jun 2011 11:46:29 +0000 (12:46 +0100)
committerMark Langsdorf <mark.langsdorf@amd.com>
Tue, 14 Jun 2011 11:46:29 +0000 (12:46 +0100)
commit046b947fb09a1fed471b5af716467bbc03f8783b
tree12438146da5ff867f5ba4754b2f732203f65eb4d
parent30090ad8567c97578099fb2aaec29a6a7c9f90a6
x86/amd: Eliminate cache flushing when entering C3 on select AMD processors

AMD Fam15h processors have a shared cache. It does not need=20
to be be flushed when entering C3 and doing so causes reduces
performance. Modify acpi_processor_power_init_bm_check to
prevent these processors from flushing when entering C3.

Signed-off-by: Mark Langsdorf <mark.langsdorf@amd.com>
xen/arch/x86/acpi/cpu_idle.c